New RF SOC to support 5G, DOCSIS 3.1, test applications
Xilinx aims to support the ongoing evolution across both wired and wireless networks with its new radio frequency system-on-chip release. The company said it is is already shipping samples to customers who are working on 5G development, new cable networks and radar applications.
The Zynq UltraScale RF SoC architecture integrates the RF signal chain into the SoC, including integration of RF data converters for a reduction of 50 to 75 percent in footprint and power requirements, according to Kirk Saban, senior director of FPGA and SoC product management and marketing at Xilinx. Saban said that in addition to supporting 5G applications, the new Zync family is also intended to support cable remote PHY deployments as that industry widens rollouts of DOCSIS 3.1, as well as test and measurement use cases. The cores features soft-decision forward error correction for addressing issues in the RF signal chain and support the very high channel count and sample counts that are increasingly needed across various network technologies, Saban said.
Xilinx has been working on the design for a number of years, Saban said, and ultimately shifted from a 28 nanometer technology test chip that was developed in 2012, to a 16 nanometer process that has resulted in the new product. Saban added that Xilinx sees a place for the devices across 5G systems, from millimeter wave wireless backhaul to 5G baseband systems to remote radio heads. On the cable said, he said, the new DOCSIS 3.1 standard is part of an evolution to a more distributed network architecture: shifting the cable head-end functions into fiber nodes in the access network.
For test and measurement, Saban said, equipment manufacturers “need to stay ahead of the game” in terms of pushing limits on sampling capabilities and high data rates, in order to help their customers do the necessary research and verification to push into next-generation networks.
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