Although RTL has traditionally been the starting point for digital design, it is becoming too expensive and time consuming. Algorithmic intensive hardware for AI in
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Categories Abstraction, ASIC, Mentor Graphics, Network Infrastructure, Qualcomm, Sponsored, Synthesis, White Paper
Designing ASIC IP at Higher Level of Abstraction – A Qualcomm Case Study
This white paper discusses reasons why a new high-level synthesis/high-level verification flow gives companies like Qualcomm several advantages. The case study example will summarize the flow